From 74992e673ac69021a7394fb1c4a860c8079aa987 Mon Sep 17 00:00:00 2001 From: SpookyDervish Date: Thu, 16 Jul 2026 12:43:41 +1000 Subject: [PATCH] change SYS instruction to PORT and add imm4 --- src/device.h | 5 +++++ src/emu.h | 1 + src/instruction.c | 12 ++++++++++-- src/instruction.h | 6 +++--- 4 files changed, 19 insertions(+), 5 deletions(-) create mode 100644 src/device.h diff --git a/src/device.h b/src/device.h new file mode 100644 index 0000000..2473ca0 --- /dev/null +++ b/src/device.h @@ -0,0 +1,5 @@ +#pragma once + +typedef struct { + +} Device; \ No newline at end of file diff --git a/src/emu.h b/src/emu.h index 294a4ce..672be73 100644 --- a/src/emu.h +++ b/src/emu.h @@ -5,6 +5,7 @@ #include #include #include "memory.h" +#include "device.h" #define FLAG_ZERO (1 << 0) #define FLAG_NEGATIVE (1 << 1) diff --git a/src/instruction.c b/src/instruction.c index 216c12b..a4f8f2e 100644 --- a/src/instruction.c +++ b/src/instruction.c @@ -15,7 +15,7 @@ const OperandType INSTRUCTION_OPERAND_TYPES[][3] = { {OP_REG, OP_REG, OP_NONE}, // JIZ {OP_REG, OP_REG, OP_NONE}, // CALL {OP_NONE, OP_NONE, OP_NONE}, // RET - {OP_REG, OP_REG, OP_REG}, // SYS + {OP_REG, OP_REG, OP_IMM4}, // PORT {OP_NONE, OP_NONE, OP_NONE} // HLT }; @@ -35,7 +35,7 @@ char* opcodeToCStr(InstructionOpcode opcode) { case INST_JIZ: return "JIZ"; case INST_CALL: return "CALL"; case INST_RET: return "RET"; - case INST_SYS: return "SYS"; + case INST_PORT: return "PORT"; case INST_HLT: return "HLT"; default: return "FIXME"; } @@ -81,6 +81,14 @@ char* instructionToCStr(Instruction inst) { registerToCStr(inst.operands[opIdx]) ); break; + case OP_IMM4: + written += snprintf( + buffer + written, + remaining, + "%d", + inst.operands[opIdx] + ); + break; case OP_IMM16: written += snprintf( buffer + written, diff --git a/src/instruction.h b/src/instruction.h index f49e7e1..0a4dfaa 100644 --- a/src/instruction.h +++ b/src/instruction.h @@ -7,8 +7,8 @@ // -- TYPES -- // typedef enum : uint8_t { - INST_MOV, INST_MVI, INST_ADD, INST_SUB, INST_LOAD, INST_STORE, INST_AND, INST_OR, - INST_XOR, INST_SHF, INST_JMP, INST_JIZ, INST_CALL, INST_RET, INST_SYS, INST_HLT + INST_MOV, INST_MVI, INST_ADD, INST_SUB, INST_LOAD, INST_STORE, INST_AND, INST_OR, + INST_XOR, INST_SHF, INST_JMP, INST_JIZ, INST_CALL, INST_RET, INST_PORT, INST_HLT } InstructionOpcode; typedef enum { @@ -38,7 +38,7 @@ typedef struct { } Instruction; typedef enum { - OP_NONE, OP_REG, OP_IMM16 + OP_NONE, OP_REG, OP_IMM4, OP_IMM16 } OperandType; // -- CONSTANTS -- //