diff --git a/meson.build b/meson.build
index c5cfb5d..274ab32 100644
--- a/meson.build
+++ b/meson.build
@@ -1,13 +1,18 @@
 project('MyLittleCPU', 'c')
 
-sources = [
+sources = files(
     'src/main.c',
     'src/emu.c',
     'src/memory.c',
     'src/instruction.c',
     'src/util.c'
-]
+)
 
-args = ['-Wall', '-Wextra', '-O3']
+asmSources = files(
+    'src/assembler/main.c'
+)
 
-executable('emu', sources, c_args: args)
\ No newline at end of file
+args = ['-Wall', '-Wextra']
+
+executable('emu', sources, c_args: args)
+execuatble('assembler', asmSources, c_args: args)
diff --git a/src/instruction.h b/src/instruction.h
index bde9f4a..f49e7e1 100644
--- a/src/instruction.h
+++ b/src/instruction.h
@@ -12,11 +12,16 @@ typedef enum : uint8_t {
 } InstructionOpcode;
 
 typedef enum {
+    // General purpose registers
     REG_A, REG_B, REG_C,
 
+    // Function arguments
     REG_X, REG_Y, REG_Z,
+
+    // Return value
     REG_R,
 
+    // Flags
     REG_F,
 
     REG_MAX // all registers should come before this one, this is so we can
@@ -41,4 +46,4 @@ extern const OperandType INSTRUCTION_OPERAND_TYPES[][3];
 
 char* opcodeToCStr(InstructionOpcode opcode);
 char* instructionToCStr(Instruction inst);
-char* registerToCStr(Register reg);
\ No newline at end of file
+char* registerToCStr(Register reg);
diff --git a/tests/add.asm b/tests/add.asm
new file mode 100644
index 0000000..843c9bd
--- /dev/null
+++ b/tests/add.asm
@@ -0,0 +1,5 @@
+mvi a 2
+mvi b 2
+
+add a b
+hlt