This commit is contained in:
2026-07-16 12:25:32 +10:00
parent b53b4b259f
commit c4b1bb1ed1
3 changed files with 20 additions and 5 deletions

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@@ -1,13 +1,18 @@
project('MyLittleCPU', 'c') project('MyLittleCPU', 'c')
sources = [ sources = files(
'src/main.c', 'src/main.c',
'src/emu.c', 'src/emu.c',
'src/memory.c', 'src/memory.c',
'src/instruction.c', 'src/instruction.c',
'src/util.c' 'src/util.c'
] )
args = ['-Wall', '-Wextra', '-O3'] asmSources = files(
'src/assembler/main.c'
)
executable('emu', sources, c_args: args) args = ['-Wall', '-Wextra']
executable('emu', sources, c_args: args)
execuatble('assembler', asmSources, c_args: args)

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@@ -12,11 +12,16 @@ typedef enum : uint8_t {
} InstructionOpcode; } InstructionOpcode;
typedef enum { typedef enum {
// General purpose registers
REG_A, REG_B, REG_C, REG_A, REG_B, REG_C,
// Function arguments
REG_X, REG_Y, REG_Z, REG_X, REG_Y, REG_Z,
// Return value
REG_R, REG_R,
// Flags
REG_F, REG_F,
REG_MAX // all registers should come before this one, this is so we can REG_MAX // all registers should come before this one, this is so we can
@@ -41,4 +46,4 @@ extern const OperandType INSTRUCTION_OPERAND_TYPES[][3];
char* opcodeToCStr(InstructionOpcode opcode); char* opcodeToCStr(InstructionOpcode opcode);
char* instructionToCStr(Instruction inst); char* instructionToCStr(Instruction inst);
char* registerToCStr(Register reg); char* registerToCStr(Register reg);

5
tests/add.asm Normal file
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@@ -0,0 +1,5 @@
mvi a 2
mvi b 2
add a b
hlt