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2 Commits
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0504067a51
| Author | SHA1 | Date | |
|---|---|---|---|
| 0504067a51 | |||
| b58b5adf65 |
102
src/emu.c
102
src/emu.c
@@ -26,6 +26,39 @@ static inline void updateDevices(Emulator* emu) {
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}
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}
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static inline void pushProgramCounter(Emulator* emu) {
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((uint32_t*)emu->mem->data)[emu->sp--] = emu->pc;
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}
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void handleInterrupt(Emulator* emu) {
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FlagsRegister flags = (FlagsRegister)emu->regs[REG_F];
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if (!flags.fields.interrupts) return;
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InterruptHandlerTable interruptTable = *((InterruptHandlerTable*)&emu->mem->data[emu->iht]);
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pushProgramCounter(emu);
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emu->pc = interruptTable.interruptHandlers[emu->irq-1];
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emu->irq = 0;
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}
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uint32_t getRegister(Emulator* emu, uint8_t reg) {
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if (reg == REG_IHT_OFFSET) {
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return emu->iht;
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}
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return emu->regs[reg];
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}
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void setRegister(Emulator* emu, uint8_t reg, uint32_t value) {
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if (reg == REG_IHT_OFFSET) {
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emu->iht = value;
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return;
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}
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emu->regs[reg] = value;
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}
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void startEmulator(Emulator* emu) {
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static void* dispatchTable[] = {
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&&MOV,
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@@ -49,93 +82,96 @@ void startEmulator(Emulator* emu) {
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emu->halted = false;
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Instruction inst;
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#define DISPATCH() updateDevices(emu); \
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#define DISPATCH() if (emu->irq != 0) handleInterrupt(emu); \
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updateDevices(emu); \
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inst = fetchInst(emu); \
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goto *dispatchTable[inst.opcode]
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DISPATCH();
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MOV: {
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emu->regs[inst.operands[0]] = emu->regs[inst.operands[1]];
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setRegister(emu, inst.operands[0], getRegister(emu, inst.operands[1]));
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DISPATCH();
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}
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MVI: {
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emu->regs[inst.operands[0]] = inst.immediate;
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setRegister(emu, inst.operands[0], inst.immediate);
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DISPATCH();
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}
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ADD: {
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int32_t result = emu->regs[inst.operands[0]] + emu->regs[inst.operands[1]];
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int32_t result = getRegister(emu, inst.operands[0]) + getRegister(emu, inst.operands[1]);
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updateFlagsRegister(emu, result);
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emu->regs[inst.operands[0]] = result;
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setRegister(emu, inst.operands[0], result);
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DISPATCH();
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}
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SUB: {
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int32_t result = emu->regs[inst.operands[0]] - emu->regs[inst.operands[1]];
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int32_t result = getRegister(emu, inst.operands[0]) - getRegister(emu, inst.operands[1]);
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updateFlagsRegister(emu, result);
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emu->regs[inst.operands[0]] = result;
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setRegister(emu, inst.operands[0], result);
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DISPATCH();
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}
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LOAD: {
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uint32_t addr = getAddress(
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emu->regs[inst.operands[1]],
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emu->regs[inst.operands[2]]
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getRegister(emu, inst.operands[1]),
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getRegister(emu, inst.operands[2])
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);
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emu->regs[inst.operands[0]] = memoryLoadWord(emu->mem, addr);
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setRegister(emu, inst.operands[0], memoryLoadWord(emu->mem, addr));
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DISPATCH();
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}
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STORE: {
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uint32_t addr = getAddress(
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emu->regs[inst.operands[0]],
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emu->regs[inst.operands[1]]
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getRegister(emu, inst.operands[1]),
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getRegister(emu, inst.operands[2])
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);
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memorySaveWord(emu->mem, addr, inst.operands[2]);
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memorySaveWord(emu->mem, addr, getRegister(emu, inst.operands[2]));
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DISPATCH();
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}
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AND: {
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int32_t result = emu->regs[inst.operands[0]] & emu->regs[inst.operands[1]];
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int32_t result = getRegister(emu, inst.operands[0]) & getRegister(emu, inst.operands[1]);
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updateFlagsRegister(emu, result);
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emu->regs[inst.operands[0]] = result;
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setRegister(emu, inst.operands[0], result);
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DISPATCH();
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}
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OR: {
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int32_t result = emu->regs[inst.operands[0]] | emu->regs[inst.operands[1]];
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int32_t result = getRegister(emu, inst.operands[0]) | getRegister(emu, inst.operands[1]);
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updateFlagsRegister(emu, result);
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emu->regs[inst.operands[0]] = result;
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setRegister(emu, inst.operands[0], result);
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DISPATCH();
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}
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XOR: {
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int32_t result = emu->regs[inst.operands[0]] ^ emu->regs[inst.operands[1]];
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int32_t result = getRegister(emu, inst.operands[0]) ^ getRegister(emu, inst.operands[1]);
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updateFlagsRegister(emu, result);
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emu->regs[inst.operands[0]] = result;
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setRegister(emu, inst.operands[0], result);
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DISPATCH();
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}
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SHF: {
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int32_t result;
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if (inst.operands[2] == 0)
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result = emu->regs[inst.operands[0]] << emu->regs[inst.operands[1]];
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if (inst.operands[0] == 0)
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result = getRegister(emu, inst.operands[0]) << getRegister(emu, inst.operands[1]);
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else
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result = emu->regs[inst.operands[0]] >> emu->regs[inst.operands[1]];
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result = getRegister(emu, inst.operands[0]) >> getRegister(emu, inst.operands[1]);
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updateFlagsRegister(emu, result);
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emu->regs[inst.operands[0]] = result;
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setRegister(emu, inst.operands[0], result);
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DISPATCH();
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}
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JMP: {
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emu->pc = getAddress(inst.operands[0], inst.operands[1]);
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emu->pc = inst.immediate;
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DISPATCH();
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}
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JIZ: {
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if (emu->regs[REG_F] & FLAG_ZERO)
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emu->pc = getAddress(inst.operands[0], inst.operands[1]);
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if (((FlagsRegister)emu->regs[REG_F]).fields.zero)
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emu->pc = inst.immediate;
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DISPATCH();
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}
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CALL: {
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// save the pc at the current sp and decrement the sp (stack grows downward)
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((uint32_t*)emu->mem->data)[emu->sp--] = emu->pc;
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pushProgramCounter(emu);
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// jump to given addr
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emu->pc = getAddress(inst.operands[0], inst.operands[1]);
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emu->pc = inst.immediate;
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DISPATCH();
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}
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@@ -145,7 +181,7 @@ void startEmulator(Emulator* emu) {
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DISPATCH();
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}
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PORT: {
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uint16_t port = emu->regs[inst.operands[0]];
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uint16_t port = getRegister(emu, inst.operands[0]);
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if (port >= MAX_DEVICES) {
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DISPATCH();
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}
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@@ -158,7 +194,7 @@ void startEmulator(Emulator* emu) {
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}
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if (direction == 0) {
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uint16_t value = emu->regs[inst.operands[1]];
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uint16_t value = getRegister(emu, inst.operands[1]);
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if (device->inPos == DEVICE_BUFFER_LENGTH) {
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DISPATCH();
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@@ -168,11 +204,11 @@ void startEmulator(Emulator* emu) {
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device->inPos++;
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} else {
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if (device->outPos == 0) {
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emu->regs[inst.operands[1]] = 0;
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setRegister(emu, inst.operands[1], 0);
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DISPATCH();
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}
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emu->regs[inst.operands[1]] = device->out[device->outPos-1];
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setRegister(emu, inst.operands[1], device->out[device->outPos-1]);
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if (device->outPos > 0)
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device->outPos--;
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}
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@@ -196,7 +232,7 @@ Emulator* initEmulator(uint32_t memorySize) {
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// zero out special regs
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newEmu->pc = MEM_PROGRAM_START;
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newEmu->sp = 0;
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newEmu->ihp = 0;
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newEmu->iht = 0;
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// init memory
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newEmu->mem = initMemory(memorySize);
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@@ -21,13 +21,17 @@ typedef struct {
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Device* devices[MAX_DEVICES];
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uint32_t pc;
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uint32_t ihp;
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uint32_t iht;
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uint32_t sp;
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bool irq;
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uint16_t irq;
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bool halted;
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} Emulator;
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typedef struct {
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uint32_t interruptHandlers[32];
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} __attribute__((packed)) InterruptHandlerTable;
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typedef union {
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struct {
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uint16_t zero : 1;
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@@ -11,8 +11,8 @@ const OperandType INSTRUCTION_OPERAND_TYPES[][3] = {
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{OP_REG, OP_REG, OP_NONE}, // OR
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{OP_REG, OP_REG, OP_NONE}, // XOR
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{OP_REG, OP_REG, OP_REG}, // SHF
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{OP_REG, OP_REG, OP_NONE}, // JMP
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{OP_REG, OP_REG, OP_NONE}, // JIZ
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{OP_IMM16, OP_NONE, OP_NONE}, // JMP
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{OP_IMM16, OP_NONE, OP_NONE}, // JIZ
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{OP_IMM16, OP_NONE, OP_NONE},// CALL
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{OP_NONE, OP_NONE, OP_NONE}, // RET
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{OP_REG, OP_REG, OP_IMM4}, // PORT
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@@ -28,6 +28,8 @@ typedef enum : uint8_t {
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// automatically know the length of the registers array
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} Register;
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#define REG_IHT_OFFSET 8 // offset of interrupt handler table register
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typedef uint16_t SerializedInst;
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typedef struct {
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